PUMA is highly optimized code for network data-path operations. It is work horse of a very high-performance networking equipment where entire processing is performed in Network Processor. It is running on NXP QorIQ processing platforms. Due to its highly optimized architecture, it achieves excellent performance while providing unimaginable flexibility due to the soft implementation.
PUMA runs on multicore NXP QorIQ Processing Platforms with integrated DPAA and is compatible with next generation Layerscape Architecture. It requires a multi-core chip with e500, e5500 or e6500 cores to execute. The code entirely runs on bare cores to achieve maximum possible performance a chip can deliver.
Management of PUMA is performed by the main core running any OS you like. Integration was already done for Linux, while it is possible to extend to other OSes.
PUMA supports offloading for the following protocols:
- custom protocols
With its unique architecture it can perform various lookup and modify operations over each packet.
PUMA supports the following interfaces:
- 1/2,5/10G Ethernet
- G.999.1 for DSL
- additional protocols by connecting FGPA via PCIe
More information about PUMA microcode is available only under NDA. Please contact us at firstname.lastname@example.org.